From 520f200d78649aae431bd8f1ae70ff5b59b186a9 Mon Sep 17 00:00:00 2001 From: SiHuaN Date: Mon, 1 Sep 2025 11:55:30 +0800 Subject: [PATCH] add clz32 MC test --- llvm/test/MC/RISCV/rvp-partial-simd-valid.s | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/llvm/test/MC/RISCV/rvp-partial-simd-valid.s b/llvm/test/MC/RISCV/rvp-partial-simd-valid.s index accb36a0e9f2..f9bdb5c4a1df 100644 --- a/llvm/test/MC/RISCV/rvp-partial-simd-valid.s +++ b/llvm/test/MC/RISCV/rvp-partial-simd-valid.s @@ -344,6 +344,12 @@ uclip32 a0, a1, 19 # CHECK-UNKNOWN: 77 85 85 af clrs32 a0, a1 +# CHECK-INST: clz32 a0, a1 +# CHECK-ENCODING: [0x77,0x85,0x95,0xaf] +# CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions) +# CHECK-UNKNOWN: 77 85 95 af +clz32 a0, a1 + # CHECK-INST: pbsad a0, a1, a2 # CHECK-ENCODING: [0x77,0x85,0xc5,0xfc] # CHECK-ERROR: instruction requires the following: 'Zpn' (Normal 'P' Instructions)