[riscv] no support for the CLIC interrupt controller #527

LK's riscv support assumes CLINT (timer/software interrupts) plus PLIC (external interrupts). There is no support for the CLIC, the vectored interrupt controller used by Nuclei and other embedded riscv cores. grep -ri clic arch/riscv platform returns nothing on master.

Adding it is not just another interrupt controller driver. The CLIC changes the trap entry contract: mtvec gains a mode field selecting vectored dispatch, interrupts arrive pre-prioritised with hardware stacking behaviour that differs from the CLINT/PLIC path, and mnxti-style tail chaining only pays off if the context switch path knows about it. That reaches into arch/riscv/exceptions.c and the assembly trap entry, not just a new file under dev/interrupt.

PR #281 (fanghuaqi) implemented this for Nuclei cores and is being closed in favour of this issue. It is worth reading, but it is not mergeable as posted: it vendors ~25k lines of NMSIS and the Nuclei SDK, and its context-switch rework was objected to in review at the time. A CLIC port that landed would want the interrupt-controller support separated from the vendor headers, and would want to work out how the CLIC trap path coexists with the existing CLINT/PLIC one rather than replacing it.