Skip to content

Add SOF support for the PHYTEC phyBOARD-Pollux i.MX8MP #11429

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
andrejpicej wants to merge 3 commits into
base: main
Choose a base branch
from
Open

Add SOF support for the PHYTEC phyBOARD-Pollux i.MX8MP #11429

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
0227818
west.yml: update zephyr to 25851fa15cdc
andrejpicej Nov 10, 2026
981172c
topology: imx: Add topology for i.MX8MP with TLV320 codec
andrejpicej Oct 27, 2026
1fac649
app: boards: Add phyBOARD-Pollux i.MX8MP audio DSP
andrejpicej Oct 27, 2026
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
11 changes: 11 additions & 0 deletions app/boards/phyboard_pollux_mimx8ml8_adsp.conf
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,11 @@
CONFIG_IMX8M=y
CONFIG_HAVE_AGENT=n
CONFIG_FORMAT_CONVERT_HIFI3=n
CONFIG_KPB_FORCE_COPY_TYPE_NORMAL=n
CONFIG_DMA=y
CONFIG_DMA_NXP_SDMA=y
CONFIG_TRACE=n
CONFIG_SHARED_INTERRUPTS=y
CONFIG_ZEPHYR_NATIVE_DRIVERS=y
CONFIG_SAI_HAS_MCLK_CONFIG_OPTION=y
CONFIG_CLOCK_CONTROL_FIXED_RATE_CLOCK=y
27 changes: 27 additions & 0 deletions app/boards/phyboard_pollux_mimx8ml8_adsp.overlay
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,27 @@
/*
* Copyright (C) 2026 PHYTEC Messtechnik GmbH
*
* SPDX-License-Identifier: Apache-2.0
*/

/ {
host_dma: dma {
compatible = "nxp,sof-host-dma";
dma-channels = <32>;
#dma-cells = <0>;
};
};

&sdma3 {
status = "okay";
};

/* SAI2 on the expansion connector, e.g. TLV320 codec on the PEB-AV-10 */
&sai2 {
rx-fifo-watermark = <65>;
tx-fifo-watermark = <65>;
fifo-depth = <128>;
/* Rx provides BCLK/FS, the frame sync is only routed on SAI2_RXFS */
tx-sync-mode = <1>;
status = "okay";
};
1 change: 1 addition & 0 deletions tools/topology/topology1/CMakeLists.txt
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -59,6 +59,7 @@ set(TPLGS
"sof-imx8-wm8960\;sof-imx8mp-eap-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=eap\;-DSAI_INDEX=3"
"sof-imx8-wm8960\;sof-imx8mp-wm8904\;-DCODEC=wm8904\;-DRATE=44100\;-DPPROC=volume\;-DSAI_INDEX=3"
"sof-imx8-wm8960\;sof-imx8mp-wm8962\;-DCODEC=wm8962\;-DRATE=48000\;-DPPROC=volume\;-DSAI_INDEX=3"
"sof-imx8-wm8960\;sof-imx8mp-tlv320\;-DCODEC=tlv320\;-DRATE=48000\;-DPPROC=volume\;-DSAI_INDEX=2"
"sof-imx8-wm8960\;sof-imx8mp-eq-iir-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=eq-iir-volume\;-DSAI_INDEX=3"
"sof-imx8-wm8960\;sof-imx8mp-eq-iir-wm8962\;-DCODEC=wm8962\;-DRATE=48000\;-DPPROC=eq-iir-volume\;-DSAI_INDEX=3"
"sof-imx8-wm8960\;sof-imx8mp-eq-fir-wm8960\;-DCODEC=wm8960\;-DRATE=48000\;-DPPROC=eq-fir-volume\;-DSAI_INDEX=3"
Expand Down
9 changes: 8 additions & 1 deletion tools/topology/topology1/sof-imx8-wm8960.m4
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
#
# Topology for i.MX8QM/i.MX8QXP/i.MX8MP board with 'CODEC' codec
#
# CODEC: wm8960, wm8962
# CODEC: wm8960, wm8962, wm8904, tlv320 (tlv320aic3007)
#

# Include topology builder
Expand Down Expand Up @@ -57,6 +57,7 @@ define(`STREAM_NAME',
`ifelse(CODEC, `wm8960', `-wm8960-hifi',
CODEC, `wm8904', `-wm8904-hifi',
CODEC, `wm8962', `-wm8962',
CODEC, `tlv320', `-tlv320',
`fatal_error(`Codec not supported.')')')

# define DAI BE dai_link name
Expand Down Expand Up @@ -108,4 +109,10 @@ ifelse(
SAI_CLOCK(fsync, RATE, codec_provider),
SAI_TDM(2, 32, 3, 3),
SAI_CONFIG_DATA(SAI, SAI_INDEX, 0)))',
CODEC, `tlv320', `
SAI_CONFIG(I2S, SAI_CLOCK(mclk, 12288000, codec_mclk_in),
SAI_CLOCK(bclk, 3072000, codec_consumer),
SAI_CLOCK(fsync, RATE, codec_consumer),
SAI_TDM(2, 32, 3, 3),
SAI_CONFIG_DATA(SAI, SAI_INDEX, 0)))',
)
2 changes: 1 addition & 1 deletion west.yml
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -87,7 +87,7 @@ manifest:

- name: zephyr
repo-path: zephyr
revision: 76f604468505b30dfafa2c5a80d8b1c665ed6633
revision: 25851fa15cdc2dc9c395807bce97fa81c46c10ee
remote: zephyrproject

# Import some projects listed in zephyr/west.yml@revision
Expand Down
Loading