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Mechanically Sympathetic
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Mechanically Sympathetic
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Achievement: Pull Sharkx2Achievement: YOLO

Achievements

Achievement: Pull Sharkx2Achievement: YOLO

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theworldofobi/README.md

Obi Obetta (Obi++)

Welcome to my GitHub!

I am a master's student in Electrical and Computer Engineering at the University of Colorado Boulder (Class of 2028), and I received my bachelor's from the University of Chicago. My main interests are in RTL design verification and computer architecture! Currently on the lookout for open-source projects and internships in FPGA/ASIC design verification.

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  1. verified-rv32i verified-rv32i Public

    An RV32I 5-Stage Pipelined Processor with coverage-driven and formal verification, written in SystemVerilog, verified with cocotb, riscv-formal, sby, and mcy

  2. feeFIFOfum feeFIFOfum Public

    Source code for CppCon 2026 Lightning Talk titled "Fee, FIFO, Fum: When C++ Abstractions Lie about Hardware"

    C++

  3. AXI-Stream-FIFO AXI-Stream-FIFO Public

    An Asynchronous AXI4-Stream FIFO in SystemVerilog with a cocotb testbench

    Python

  4. RoundRobinUVM RoundRobinUVM Public

    A parameterized round robin arbiter, verified using pyuvm and UVM on EDA Playground

    SystemVerilog